In the electronics industry low signal impedance in interconnect structures, for example, in vias, is a concern.
In a microelectronic device, such as a ceramic flip-chip package, electrical performance of vias is becoming more and more significant to the overall signal integrity when the signal speed or frequency moves higher, as well as the die bonding pad pitch is reduced. This is mainly due to the discontinuity or the lower characteristic impedance of the vias. For high speed and RF signal applications, interconnects (traces: horizontal structures, vias: vertical structures) with characterization impedance of 50 Ohm (some RF applications also require 75 Ohm characterization impedance interconnects) are needed along the entire electrical pathway from one device to another. Via characterization impedance in a package depends on the distance between vias and the permittivity of the surrounding dielectric materials. The longer the distance and the lower the dielectric constant, the higher the characterization impedance.
A ceramic flip-chip package has a number of advantages, such as having a thermal coefficient of expansion close to the semiconductor material, a large number of the layers to accommodate more IOs and power structures, and lower signal loss for high speed applications. In ceramic flip-chip packages, in order to have a 50-Ohm characteristic impedance signal via, large signal via spacing is required due to the higher permittivity value of the ceramic. This design is not practical for dies with high density bonding pads and is against the trend of smaller die pad pitch for advance technologies (almost all new applications are migrating in the direction of smaller bonding pad pitch to save die area and lower cost). Changing to a lower permittivity dielectric package carrier may solve this characteristic impedance issue, but may introduce new electrical problems to the power structure and undesirably alter the loss, mechanical, density and thermal characteristics as compared to a ceramic substrate. Also the low permittivity substrate can be costlier and allow for fewer power, ground and signal layers.
There exists a need in the industry, therefore, for a structure which can obtain both a more desirable via characteristic impedance and retain the ceramic package benefits of allowing more IOs and power structures, better match of thermal coefficient of expansion to the die and lower signal loss.